If you're in the business of making high performance routers
and network access concentrators, HIPP was created for
you. Imagine security chips that process each packet without
hardware relying on the CPU to intervene at every stage
of compression, encryption and authentication. Now add
an integral public key processor and true random number
generator, and say good-bye to endless protocol software
development - with HIPP it's done on-chip in microcode.
As you glance over at your available options consider
this: HIPP is the recognized way to go to reduce system
latency and guarantee system performance with full packet
processing, not just algorithm acceleration, and Hifn's
common architecture is the shortest path to future performance
enhancements.
Common
processor architecture, plus Hifn's unmatched design experience,
means faster time to market and higher reliability
Adopt the Hifn architecture and you'll be able to concentrate
your design efforts on creating the best possible network
access products, because the security part of your design
is extensible and scalable, with a rock-solid software
wrap. It includes a HIPP Software Development Kit (SDK)
or Hifn's Security Platform, HSP, which also clears the
way towards FIPS 140-1 level 3 compliance. You can take
your pick of solutions from IPsec T3 to multi-gigabit
or SSL e-commerce security processors. Either way, you
can choose a starting point with the knowledge that the
next Hifn chip will fit in your design with a minimum
of effort. Hifn engineers have helped design security
into the world's most highly regarded routing and networking
equipment, made by companies such as Cisco, Nortel, Lucent,
and many others. You can depend on Hifn as you design
your best networking products ever.
OC-3
to OC-12 in a single easy step
Scaling performance to OC-12 is achieved by connecting
four HIPP 7854s on the streaming bus interface - yielding
full-duplex OC-12 data rates even on small packets. As
for Security Associations (SAs), the Hifn processor takes
you well beyond the standard few thousands offered by
most vendors by delivering a staggering 512,000 SAs.
Features
& Benefits
- Intelligent
Packet Processing architecture results in minimal host CPU interaction
and maximum system performance
- Single
pass header & trailer processing, compression, encryption
and authentication
- On-chip
processing for mutable fields, anti-replay, stateful sequence
number checking and header checksum modification
-
(7854) 500 Mbps IPsec (3DES/SHA-1 or AES/SHA-1)
(7814) 200 Mbps IPsec (3DES/SHA-1 or AES/SHA-1)
- (7854)
300 IKE Quick Mode connections per second
(7814) 120 IKE Quick Mode connections per second
- Support
for up to 2K-bit public keys natively
- LZS and
MPPC compression engines run at up to 700Mbps and increase the
effective data rate throughput of the 7854 when enabled
- Compression
feature is ideal for wireless applications
- Stateful
packet processing and support of ARC4* algorithm maximize PPTP
performance
- High speed
32 or 64-bit/ 66MHz PCI or Streaming Bus interface
- HSP Architecture
enables FIPS 140-1 level 3 compliance
- 512K simultaneous
sessions supported
- HSP or
SDK software shortens development cycle
- 480 BGA
package
- 1.5W typical
power consumption (7814)
ARC4
is an algorithm completely compatible with RSA's RC4(tm)