|
|
|
|
S29WSxxxN MirrorBit™ Flash Family
S29WS256N, S29WS128N, S29WS064N
256/128/64 Megabit (16/8/4 M x 16-Bit) CMOS 1.8 Volt-only
Simultaneous Read/Write, Burst Mode Flash Memory
General Description
The WSxxxN is a 256/128/64 Mbit, 1.8 Volt-only, simultaneous Read/Write, Burst Mode Flash memory device, organized as 16/8/4 Mwords of 16 bits. This device uses a single VCC of 1.70 to 1.95 V to read, program, and erase the memory array. A 9.0-volt VHH on ACC may be used for faster program performance if desired. The device can be programmed in standard EPROM programmers.
Distinctive Characteristics
Architectural Advantages
- Single 1.8 volt read, program and erase (1.70 to 1.95 volt)
- Manufactured on 110 nm MirrorBitTM process technology
- VersatileIO™ (VIO) Feature
- Device generates data output voltages and tolerates data input voltages as determined by the voltage on the VIO pin VIO options available for 1.8 V (1.70 V – 1.95 V)
- Simultaneous Read/Write operation
- Data can be continuously read from one bank while executing erase/program functions in another bank
- Zero latency between read and write operations
- Sixteen bank architecture: Each bank consists of 16Mb (WS256N) / 8Mb (WS128N)/4Mb (WS064N)
- Programable Burst Interface
- 2 Modes of Burst Read Operation
- Linear Burst: 32, 16, and 8 words with or without wrap-around
- Continuous Sequential Burst
- SecSi™ (Secured Silicon) Sector region
- 256 words accessible through a command sequence, 128 words for the Factory SecSi Sector and 128 words for the Customer SecSi Sector.
- Sector Architecture
- S29WS256N: Eight 16 Kword sectors and two-hundred-fifty-four 64 Kword sectors
- S29WS128N: Eight 16 Kword sectors and one-hundred-twenty-six 64 Kword sectors
- S29WS064N: Eight 16 Kword sectors and sixty-two 64 Kword sectors
- Banks 0 and 15 each contain 16 Kword sectors and 64 Kword sectors; Other banks each contain 64 Kword sectors
- Eight 16 Kword boot sectors, four at the top of the address range, and four at the bottom of the address range
- 100,000 erase cycles per sector typical
- Data Retention: 20-year typical
- MCP-Compatible Packages (Recommended for all new designs)
- 84-ball (8 mm x 11.6 mm) FBGA package for WS256N
- 80-ball (8 mm x 11.6 mm) FBGA package for WS128N
- 80-ball (7 mm x 9 mm) FBGA package for WS064N
Return to Top
Performance Characteristics
- Read access times at 80/66/54 MHz @ 1.8V VIO
(1.65-1.95V)
- Burst access times of 9/11.2/13.5 ns
- Synchronous initial latency of 69/69/69 ns
- Asynchronous random access times of 70/70/70 ns
- High Performance
- Typical word programming time of ‹40 µs
- Typical effective word programming time of ‹9.4 µs utilizing a 32-Word Write Buffer at VCC Level
- Typical effective word programming time of ‹6 µs utilizing a 32-Word Write Buffer at ACC Level
- Typical sector erase time of ‹150 ms for the 16 Kword sectors and ‹6400 ms sector erase time for 64 Kword sectors
- Power dissipation (typical values, CL = 30 pF) @ 66 MHz
- Continuous Burst Mode Read: ‹35 mA
- Simultaneous Operation: ‹50 mA
- Program: ‹19 mA
- Erase: ‹19 mA
- Standby mode: ‹20 µA
Return to Top
Hardware Features
- Sector Protection
- Write protect (WP#) function allows protection of eight outermost boot sectors, four at top and four at bottom of memory, regardless of sector protect status
- Handshaking feature available
- Provides host system with minimum possible latency by monitoring RDY
- Hardware reset input (RESET#)
- Hardware method to reset the device for reading array data
- Boot Option
- CMOS compatible inputs, CMOS compatible outputs
- Low VCC write inhibit
Return to Top
Security Features
- Advanced Sector Protection consists of the two following modes of operation
- Persistent Sector Protection
- A command sector protection method to lock combinations of individual sectors to prevent program or erase operations within that sector
- Sectors can be locked and unlocked in-system at VCC level
- Password Sector Protection
- A sophisticated sector protection method to lock combinations of individual sectors to prevent program or erase operations within that sector using a user-defined 64-bit password
Return to Top
Software Features
- Supports Common Flash Memory Interface (CFI)
- Software command set compatible with JEDEC 42.4 standards
- Data# Polling and toggle bits
- Provides a software method of detecting program and erase operation completion
- Erase Suspend/Resume
- Suspends an erase operation to read data from, or program data to, a sector that is not being erased, then resumes the erase operation
- Program Suspend/Resume
- Suspends a programming operation to read data from a sector other than the one being programmed, then resume the programming operation
- Unlock Bypass Program command
- Reduces overall single word programming time when issuing multiple program command sequences
Additional Features
- Program Operation
- Ability to perform synchronous and asynchronous program operation independent of burst control register setting
- ACC input pin
- Acceleration function reduces programming and erase time in a factory setting
Return to Top
|
|
|
|
|
